The present-day fabrication of chip components and in particular of memory components is becoming increasingly complex on account of ever decreasing dimensions. By way of example, in current memory components the number of individual memory cells is reaching the 1 Gbit limit. Memory modules with a size of 512 Mbytes in which a plurality of individual memory components of this type are arranged on a circuit board have become commercially available in the meantime.
It is evident that the fabrication of a large number of memory cells in a semiconductor body of the memory component including the drive logic for the individual cells can lead to defects and failures of memory cells. Therefore, modern memory components contain redundant memory cells and switching elements which replace the failed elements in the event of memory cells failing or switching elements failing. Identifying defective elements of a memory component requires a memory test which is carried out, inter alia, at the wafer level during a fabrication step. After an identification, fusible links are severed in order to activate redundant elements. Such fusible links are generally referred to as fuses.
By way of example, a number of fuse elements which replace defective memory cells are provided in a memory component. These fusible links or fuses are severed in such a way that in the event of later addressing of a defective memory cell, the redundant memory element is accessed instead of the defective memory cell.
Through the blowing of the fuses or the fusing of the fusible links in a late fabrication phase of the memory component, one specific configuration is selected from a plurality of possible configurations and finally defined by selective blowing of the fuses. The fusible links are often fused by means of a laser-induced process which destroys a thin metallic line acting as a fusible link at the location provided therefor and thus interrupts the connection.
One fundamental problem with this fabrication process is that the test operation and the configuration of the memory component are effected at the wafer level. Only afterward is the semiconductor body, the so-called “die”, surrounded with a housing, the “package”, as a result of which the semiconductor body can no longer be accessed later with a laser. The memory component is subsequently processed further and applied to a memory module. The process of soldering the memory component onto the memory module during further fabrication processes exerts a severe thermal stress on the memory module and the memory component. Temperatures of up to 200° C. are reached, whereby individual memory cells or other elements within the memory component are possibly damaged and may fail.
At this point in time in the fabrication method the fuses of the memory are no longer accessible, with the result that the cells that have then failed cannot be replaced. Although in some instances only individual memory cells of the memory component are defective, the component must nevertheless be rejected as defective, as a result of which the fabrication costs increase and the component yield decreases.
It is an object of the present invention to specify a chip component and preferably a memory component in which the failure rate is lower. Furthermore, it is an object of the invention to provide a fabrication method which is more cost-effective and leads to low failure rates.
With regard to the arrangement, the object is achieved by means of a chip component comprising a semiconductor body. At least one switchable element is arranged in a partial region of the semiconductor body. The partial region can be reached by light of at least one wavelength for the switching of the element. Furthermore, an integrated circuit is provided in the semiconductor body, said integrated circuit being embodied for assuming one configuration from a first and at least one second possible configuration. The first and at least one second configuration are formed such that they can be selected by means of the at least one switchable element. One configuration of the first and at least one second configuration is defined by a state of the at least one switchable element. Finally, a housing encloses the semiconductor body and comprises a partial region which is arranged at least partly above the partial region of the semiconductor body. The partial region of the housing is formed in such a way that the light can be fed to the partial region of the semiconductor body.
As a result, the region of the switchable element of the semiconductor body remains able to be reached even after the semiconductor body has been embedded in a surrounding housing. In late fabrication steps or after fabrication, a configuration of the integrated circuit of the semiconductor body can still be selected and be defined through a change in the state of the at least one switchable element. Defective switching elements of the semiconductor body which are produced in later fabrication steps of the production process can thus be repaired. In particular, defective memory cells in a memory component can be replaced by redundant cells.
In one preferred embodiment, at least the partial region of the housing is formed with a light-transmissive material and preferably with a transparent plastic or with glass. The light-transmissive material advantageously permits access to the switchable elements, for example by light and in particular by a laser beam.
In this connection it is expedient to form at least one switchable element with a fusible link. Preferably, the at least one switchable element is formed as a one-time switchable element, a first switching state of the element being given by an electrical conductivity and a second switching state of the element being given by a blocked state. The second switching state is preferably formed by blowing or fusing. One configuration from a multiplicity of possible configurations of the integrated circuit is thus defined by selective destruction of the at least one switchable element. The first switching state of the element is given when the latter is not blown, fused or generally not destroyed. The second switching state of the element is defined by the blown, fused or generally destroyed element.